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어셈블러 교육용 시뮬레이터(SEDLA)의 설계와 구현

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  SEDLA is a Hypothetical small computer that has been developed to illustrate the general concepts presented in to serve as a principle digital computer, and for our discussion of assembly language programming.   This Hypothetical small computer has a memory 256 12-bit words. It has been modeled the Digital Equipment Corporation PDP-8"s logical organization.   This computer can be simulated on any available commercial computer. If such a simulation is available, the reader can actually experimentally explore the programming techniques necessary to carry out a given information processing task with out having to use the much more complicated instruction set of commercial computer.   General operation system of SEDLA is stored program information processor in the Pc. And the program executed by SEDLA, and the data needed by the program are stored in the memory.

Abstract<BR>1. 서론<BR>2. SEDLA 개발의 환경<BR>3. 시뮬레이션<BR>4. SEDLA의 실행<BR>5. 결론과 결과<BR>6. 감사의 글<BR>7. 참고 및 인용문헌<BR>

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