KCI등재
학술저널
3D 적층 IC를 위한 웨이퍼 레벨 본딩 기술
Wafer Level Bonding Technology for 3D Stacked IC
- 한국마이크로전자및패키징학회
- 마이크로전자 및 패키징학회지
- 제20권 제1호
- : KCI등재후보
- 2013.03
- 7 - 13 (7 pages)
DOI : 10.6117/kmeps.2013.20.1.007
3D stacked IC is one of the promising candidates which can keep Moore's law valid for next decades. IC can be stacked through various bonding technologies and they were reviewed in this report, for example, wafer direct bonding and atomic diffusion bonding, etc. As an effort to reduce the high temperature and pressure which were required for high bonding strength in conventional Cu-Cu thermo-compression bonding, surface activated bonding, solid liquid inter-diffusion and direct bonding interface technologies are actively being developed.
1. 서론
2. 본딩 기술
3. Hybrid bonding
4. Wafer level Cu-Cu thermo-compression bonding
감사의 글
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