A Study of Wire Sweep During Encapsulation of Semiconductor Chips

A Study of Wire Sweep During Encapsulation of Semiconductor Chips

In this paper, methods to analyze wire sweep during the semiconductor chip encapsulation have been studied. The wire sweep analysis is used to analyze the deformation of bonding wires that connect the chip to the leadframe during encapsulation. The analysis is done using either analytical solutions or numerical simulation. The analytical solution is used for rough but fast calculation of wire sweep. The results from the numerical simulation are closest to the experimental results.

1. Introduction

2. Wire Sweep Analysis

3. Conclusion

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