Analytical Drain-Induced-Barrier-Lowering Model of Elliptic Gate-All-Around FET with Ferroelectric
Analytical Drain-Induced-Barrier-Lowering Model of Elliptic Gate-All-Around FET with Ferroelectric
- 한국전기전자재료학회
- Journal of the Korean Institute of Electrical and Electronic Material Engineers
- Vol.38No.4
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2025.01396 - 403 (8 pages)
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Drain Induced Barrier Lowering (DIBL) was analyzed when the channel of Gate-All-Around (GAA) FET, which is the most promising in the miniaturizing transistor structure, has an elliptic cross-section. The oxide film structure used a stacked Metal-Ferroelectric-Metal-Insulator-Semiconductor (MFMIS) structure using SiO<sub>2</sub> and ferroelectric. An analytical DIBL model was presented to analyze the DIBL in elliptic GAA FET with ferroelectric. Its validity was proven by comparing the results of other papers. As a result, the Drain Induced Barrier Rising (DIBR) effect, that is, the negative DIBL effect, appeared depending on the ferroelectric thickness t<sub>fe</sub>, and the ratio of the remanent polarization P<sub>r</sub> and coercive field E<sub>c</sub> in the ferroelectric, P<sub>r</sub>/E<sub>c</sub>. The DIBL varied linearly with t<sub>fe</sub>E<sub>c</sub>/P<sub>r</sub>, and the slope depended on the rate of change for the drain voltage of the ferroelectric charge Q, dQ/dV<sub>ds</sub>. The t<sub>fe</sub>E<sub>c</sub>/P<sub>r</sub> value satisfying DIBL=0 mV/V decreased as eccentricity increased. The ferroelectric thickness t<sub>fe</sub> will have to be decreased because the subthreshold swing increases if the P<sub>r</sub>/E<sub>c</sub> is increased to reduce the t<sub>fe</sub>E<sub>c</sub>/P<sub>r</sub> value. The threshold voltage increased at this time, but the effect was minimal.
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